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United States Patent | 6,199,145 |
Ajanovic ,   et al. | March 6, 2001 |
A page closing method and apparatus for multi-port host bridges. According to a method disclosed, a plurality of memory access commands are received from a plurality of command ports. A command is selected from one of the command ports to be the next memory access command executed. A number of pages of memory are closed in response to the command selected as the next memory access command. The number of pages closed is determined at least in part on which command port provides the next memory access command.
Inventors: | Ajanovic; Jasmin (Folsom, CA); Williams; Michael W. (Citrus Heights, CA); Murdoch; Robert N. (Sacramento, CA) |
Assignee: | Intel Corporation (Santa Clara, CA) |
Appl. No.: | 032434 |
Filed: | February 27, 1998 |
Current U.S. Class: | 711/149; 711/105; 711/131; 711/150; 711/154 |
Intern'l Class: | G06F 012/00 |
Field of Search: | 711/1,4,5,100,104,105,131,149,150,154 |
5479635 | Dec., 1995 | Kametani | 395/405. |
5604883 | Feb., 1997 | King et al. | 395/481. |
5651130 | Jul., 1997 | Hinkle et al. | 395/432. |
5664153 | Sep., 1997 | Farrell | 711/154. |
5666323 | Sep., 1997 | Zagar | 365/233. |
5844856 | Dec., 1998 | Taylor | 365/230. |
5940848 | Aug., 1999 | Bains | 711/1. |
5953740 | Sep., 1999 | King et al. | 711/118. |