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United States Patent | 6,177,327 |
Chao | January 23, 2001 |
A method of manufacturing a capacitor for a mixed-mode circuit device. A substrate having an isolation region is provided. A bottom electrode is formed on the isolation region. A spacer is formed on a sidewall of the bottom electrode. A dielectric layer is formed on the bottom electrode. A conductive layer is formed over the substrate. The conductive layer is patterned to form an upper electrode.
Inventors: | Chao; Yu-Feng (Hsinchu, TW) |
Assignee: | United Semiconductor Corp. (Hsinchu, TW) |
Appl. No.: | 250628 |
Filed: | February 16, 1999 |
Jan 16, 1999[TW] | 88100646 |
Current U.S. Class: | 438/396; 257/E21.008; 257/E27.016 |
Intern'l Class: | H01L 021/824.2 |
Field of Search: | 438/253,396,FOR 220,FOR 430 |
5918119 | Jun., 1999 | Huang. | |
5940713 | Aug., 1999 | Green. | |
5966600 | Oct., 1999 | Hong. |