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United States Patent | 6,171,459 |
Leiphart | January 9, 2001 |
An improved apparatus and method for manufacturing semiconductor devices, and, in particular, for depositing material at the bottom of a contact hole, comprises sputtering a material onto a semiconductor substrate; applying a first bias voltage to the substrate, simultaneously removing the material surrounding the contact hole to form a facet at the top of the recess; and applying a second bias voltage to the substrate, simultaneously sputter-depositing the first material onto the bottom of the recess. A further embodiment of the invention utilizes an electrically isolated collimator for the sputtering apparatus. Another embodiment of the invention resputters a first material onto sidewalls of a contact hole during physical vapor deposition.
Inventors: | Leiphart; Shane P. (Boise, ID) |
Assignee: | Micron Technology, Inc. (Boise, ID) |
Appl. No.: | 228857 |
Filed: | January 12, 1999 |
Intern'l Class: | C23C 014/34 |
Field of Search: | 204/192.12,192.15,192.3,192.32,192.35 |
4717462 | Jan., 1988 | Homma et al. | 204/298. |
4724060 | Feb., 1988 | Sakata et al. | 204/298. |
4824544 | Apr., 1989 | Mikalesen et al. | 204/298. |
4834856 | May., 1989 | Wehner | 204/192. |
4839306 | Jun., 1989 | Wakamatsu | 437/67. |
5049975 | Sep., 1991 | Ajika et al. | 357/71. |
5114556 | May., 1992 | Lamont, Jr. | 204/192. |
5254872 | Oct., 1993 | Yoda et al. | 257/751. |
5266524 | Nov., 1993 | Wolters | 437/194. |
5302266 | Apr., 1994 | Grabarz et al. | 204/192. |
5317187 | May., 1994 | Hindman et al. | 257/659. |
5416048 | May., 1995 | Blalock et al. | 437/228. |
5482611 | Jan., 1996 | Helmer et al. | 204/298. |
5486492 | Jan., 1996 | Yamamoto et al. | 437/192. |
5529670 | Jun., 1996 | Ryan et al. | 204/192. |
5639357 | Jun., 1997 | Xu | 204/192. |
5658438 | Aug., 1997 | Givens et al. | 204/192. |
5705042 | Jan., 1998 | Leiphart et al. | 204/192. |
5723362 | Mar., 1998 | Inoue et al. | 437/190. |
5725739 | Mar., 1998 | Hu | 204/192. |
5736776 | Apr., 1998 | Yamamoto et al. | 257/532. |
5780357 | Jul., 1998 | Xu et al. | 438/639. |
5807467 | Sep., 1998 | Givens et al. | 204/192. |
5861344 | Jan., 1999 | Roberts et al. | 438/738. |
5997699 | Dec., 1999 | Leiphart | 204/192. |
Clarke, A., "Low-Angle Sidewall Planarization", Semiconductor International, vol. 18, No. 9, 1, (Aug., 1995). Ogawa, S., et al., "Dependence of Thermal Stability of the Titanium Silicide/Silicon Structure on Impurities", Applied Physics Letters, vol. 56, No. 8, 725-727, (Feb. 19, 1990). Wehner, G.K., "The Aspects of Sputtering in Surface Analysis Methods", Methods of Surface Analysis, Elsevier Scientific, vol. 1, 5-37, (1975). Homma, Y., et al., "Planarization Mechanism of RF-Biased Al Sputtering", J. Electrochem. Soc., 140, 855-860, (Mar., 1993). Mogami, T., et al., "Planarized via-Hole Filling with Molybdenum by Bias Sputtering", Japanese Journal of Applied Physics, Pt. 1, 1516-1520, (Aug., 1988). |