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United States Patent | 6,085,317 |
Smith | July 4, 2000 |
A method and system for computing using reconfigurable computer architecture utilizing logic devices is disclosed. The computing may be accomplished by configuring a first programmable logic unit as a system controller. The system controller directs the implementation of an algorithm in a second one of the programmable logic units concurrently with reconfirguring a third one of the programmable logic units. In another aspect, the computing system may include a pair of independent, bi-directional busses each of which is arranged to electrically interconnect the system controller and the plurality of programmable logic devices. With this arrangement, a first bus may be used to reconfigure a selected one of the programmable logic devices as directed by the system controller while the second bus is used by an operational one of the programmable logic devices.
Inventors: | Smith; Stephen J. (Los Gatos, CA) |
Assignee: | Altera Corporation (San Jose, CA) |
Appl. No.: | 911958 |
Filed: | August 15, 1997 |
Current U.S. Class: | 713/1; 713/2; 713/100 |
Intern'l Class: | G06F 009/445 |
Field of Search: | 395/651,652,653 713/1,2,100 |
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5550782 | Aug., 1996 | Cliff et al. |
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