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United States Patent | 6,075,269 |
Terasawa ,   et al. | June 13, 2000 |
A semiconductor device that includes a recessed portion formed by isotropic-etching through an opening in an oxide layer on a surface of the semiconductor substrate, an opening formed in an oxide layer formed on the inner surface of the recessed portion by anisotropic etching, a recessed portion formed adjacent another recessed portion by isotropic etching through the opening. An overhang portion in the oxide layers at the opening is used as a mask in successive etching steps, and the isotropic and anistropic etching steps are repeated through the same mask, to eliminate errors in stacking masks and obtaining a deep notched gate structure within a short period. A cross-sectional shape of the recessed portion includes a plurality of curved recessed portions of different curvatures. A semiconductor device thus formed includes a recessed portion having a high aspect (length/width) ratio, and a depth larger than the width.
Inventors: | Terasawa; Yoshio (Hitachinaka, JP); Sekiya; Takayuki (Nagoya, JP) |
Assignee: | NGK Insulators, Ltd. (JP) |
Appl. No.: | 068718 |
Filed: | July 2, 1998 |
PCT Filed: | September 19, 1997 |
PCT NO: | PCT/JP97/03324 |
371 Date: | July 2, 1998 |
102(e) Date: | July 2, 1998 |
PCT PUB.NO.: | WO98/12756 |
PCT PUB. Date: | March 26, 1998 |
Sep 19, 1996[JP] | 8-247544 |
Current U.S. Class: | 257/330; 257/153; 257/334; 438/700; 438/734 |
Intern'l Class: | H01L 029/744; H01L 029/78 |
Field of Search: | 257/330,331,332,334,144,153,163 438/700,734,735 |
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