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United States Patent | 6,038,169 |
Ogura ,   et al. | March 14, 2000 |
In this invention a reference circuit is disclosed that produces a reference current to be used in determining the value of data in a flash memory cell. The memory cell current is compared to the reference current in a sense amplifier. A reference circuit that generates the reference current is connect to each bit line of the flash memory and uses bit lines that are not activated when a particular cell is being read to connect the reference current to the sense amplifiers. The use of a reference current allows multi-bit cells to be read by using a variation on the reference circuit that has a plurality of reference transistors creating a plurality of reference currents.. Verification of the programmed and erase states of a flash memory cell can be determined using different values of the reference current that are easily set in the reference circuit by changing a reference voltage.
Inventors: | Ogura; Seiki (Wappingers Falls, NY); Ogura; Tomoko (Wappingers Falls, NY) |
Assignee: | Halo LSI Design & Device Technology, Inc. (Wappingers Falls, NY) |
Appl. No.: | 270596 |
Filed: | March 18, 1999 |
Current U.S. Class: | 365/185.11; 365/185.2; 365/185.33 |
Intern'l Class: | G11C 016/04 |
Field of Search: | 365/185.05,185.11,185.18,185.2,185.33 |
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