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United States Patent | 5,568,078 |
Lee | October 22, 1996 |
For clock delay compensation and duty control of a phase-locked loop in a decoder of a video signal receiving system, phases of two input clocks received into a phase comparative detector are compared to divide a reference clock from an oscillator of the phase comparative detector for obtaining a resultant phase error output in a divider in accordance with the result of the phase comparison, a duty ratio of the output clock therefrom is controlled in a duty controller to allow the phase comparative detector to be utilized free from the duty ratio of the clock, and a clock delay compensator performs correction of clock delay compensation of the system operated at high speed in the synchronized phase-locked loop, thereby controlling a duty ratio of a signal divided in the divider when determining accuracy, frequency and stabilization in the duty controller, and correcting an error in delay time by adding the clock delay compensator.
Inventors: | Lee; Seung Y. (Seoul, KR) |
Assignee: | Hyundai Electronics Industries Co., Ltd. (Kyoungki-Do, KR) |
Appl. No.: | 464324 |
Filed: | June 5, 1995 |
Dec 30, 1994[KR] | 94-39868 |
Current U.S. Class: | 327/262; 327/141; 327/147; 327/149; 327/156; 327/158; 327/175; 327/261; 327/291; 327/292; 331/25 |
Intern'l Class: | H03L 007/00; H03K 005/159 |
Field of Search: | 327/147,149,155,146,158,156,172,175,292,291,362,141,261,262 331/18,25 |
5008636 | Apr., 1991 | Markinson et al. | 331/2. |
5118975 | Jun., 1992 | Hillis et al. | 327/158. |
5329599 | Jul., 1994 | Curry et al. | 382/54. |
Foreign Patent Documents | |||
6-309799 | Nov., 1994 | JP. |