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United States Patent | 5,548,548 |
Chatterjee ,   et al. | August 20, 1996 |
A design to attain a pass transistor for a 256 Mbit DRAM part. The transistor having a gate length of about 0.3 .mu.m, a t.sub.ox of about 85 .ANG., which is much thicker than the .about.65 .ANG. t.sub.ox for 0.25 .mu.m logic technology, a V.sub.WL of 3.75 V, a V.sub.sub of -1 V, arsenic LDD and a boron concentration in the channel region of about 2.7.times.10.sup.17 /cm.sup.3 are the desired technological choices for 256 Mbit DRAM devices.
Inventors: | Chatterjee; Amitava (Plano, TX); Liu; Jiann (Irving, TX); Mozumder; Purnendu (Plano, TX); Rodder; Mark S. (University Park, TX); Chen; Ih-Chin (Richardson, TX) |
Assignee: | Texas Instruments Incorporated (Dallas, TX) |
Appl. No.: | 358647 |
Filed: | December 19, 1994 |
Current U.S. Class: | 365/149; 257/327; 257/E21.654; 257/E29.064; 257/E29.132; 257/E29.135; 365/182; 365/189.09 |
Intern'l Class: | G11C 011/401 |
Field of Search: | 365/149,182,189.09 257/327,901,347 |
5274586 | Dec., 1993 | Matsukawa | 365/149. |
5309386 | May., 1994 | Yusuki et al. | 365/149. |
5323343 | Jun., 1994 | Ogoh et al. | 365/149. |
R. Dennard et al., "1.mu.m Mosfet VLSI. . . Applications," IEEE J. of S.-S. CKTS, vol. Sc-14, #2, Apr. 1979, pp. 247-255. M. Konaka et al., "Suppression of Anomalous Organ Current in Short Chan. Mosfet," Jap. J.A.P., vol. 18, 1979, Supl. 16-1, pp. 27-33. B. Hoeneisen et al., "Fundamental Limitations in Microelectronics-I. Mos Tech.," Solid-State Electronics, 1972, vol. 15, pp. 819-829. Kawakara et al., Subthreshold Current Reduction for Decoded-Driver by Self-Reverse Biasing, IEEE Journal of Solid-State Circuits, vol. 28, No. 11, Nov. 1993, pp. 1136-1143. Rodder et al., Oxide Thickness Dependence of Inverter Delay and Device Reliability for 0.25.mu.m CMOS Technology, IEDM 93, pp. 879-882. |