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United States Patent | 5,341,272 |
Madan | August 23, 1994 |
A method for forming a storage capacitor (12) including the step of forming a storage node contact window (38) and forming a cavity (48) in the storage electrode (50) such that the capacitive area includes the sidewalls of the storage electrode and the cavity in the storage electrode. The capacitor is completed by forming a dielectric layer (54) over the storage electrode (50) and forming a conductive layer (56) over the dielectric layer (54) to act as a plate electrode capacitively-coupled to the storage electrode (50) through the dielectric layer (54). Other devices, systems and methods are also disclosed.
Inventors: | Madan; Sudhir K. (Dallas, TX) |
Assignee: | Texas Instruments, Incorporated (Dallas, TX) |
Appl. No.: | 941484 |
Filed: | September 8, 1992 |
Intern'l Class: | H01G 004/06 |
Field of Search: | 361/311,312,313 437/47,52,90,919 29/25.42 |
4009424 | Feb., 1977 | Itoh | 361/311. |
4700457 | Oct., 1987 | Matsukawa | 437/52. |
4742018 | May., 1988 | Kimura et al. | 437/48. |
5185284 | Feb., 1993 | Motonami | 437/52. |
5244824 | Sep., 1993 | Sivan | 437/52. |
"3-Dimensional Stacked Capacitor for 16M and 64M DRAMS", Ema et al., International Electron Devices Meeting, Dec., 1988, pp. 592-595. "Novel High Density, Stacked Capacitor MOS RAM", Koyanagi et al., International Election Devices Meeting, Dec., 1978, pp. 348-351. |