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United States Patent |
5,284,696
|
Satoh
,   et al.
|
February 8, 1994
|
Conductive pattern layer structure and method of producing the
conductive pattern layer structure
Abstract
A conductive pattern layer structure includes an insulating member
containing polyimide, a patterned thin film formed on the insulating
member, and a patterned conductive layer formed on the thin film. The
patterned conductive layer contains copper. Further, the layer structure
includes a patterned barrier layer covering an upper surface and side
surfaces of the patterned conductive layer to prevent copper from being
diffused into another insulating layer formed around the patterned barrier
layer.
Inventors:
|
Satoh; Kazuaki (Kawasaki, JP);
Iida; Kenji (Kawasaki, JP)
|
Assignee:
|
Fujitsu Limited (Kawasaki, JP)
|
Appl. No.:
|
971226 |
Filed:
|
November 4, 1992 |
Foreign Application Priority Data
Intern'l Class: |
B32B 009/00 |
Field of Search: |
428/209,210,212
430/5
|
References Cited
U.S. Patent Documents
4411972 | Oct., 1983 | Narken et al. | 430/5.
|
4720442 | Jan., 1988 | Shinkai et al. | 430/5.
|
Foreign Patent Documents |
108797 | May., 1991 | JP.
| |
Primary Examiner: Ryan; Patrick J.
Assistant Examiner: Lee; Kam F.
Attorney, Agent or Firm: Armstrong, Westerman, Hattori, McLeland & Naughton
Claims
What is claimed is:
1. A conductive pattern layer structure comprising:
an insulating member comprising polyimide;
a patterned thin film formed on the insulating member;
a patterned conductive layer formed on the thin film, said patterned
conductive layer comprising copper; and
a patterned barrier layer covering an upper surface and side surfaces of
the patterned conductive layer and preventing copper from being diffused
into another insulating layer formed around the patterned barrier layer.
2. The conductive pattern layer structure as claimed in claim 1, wherein
said patterned barrier layer comprises chromium.
3. The conductive pattern layer structure as claimed in claim 1, wherein
said conductive pattern layer structure comprises a layer structure in
which the patterned thin film formed on the insulating member and the
patterned barrier layer are stacked in that order.
4. The conductive pattern layer structure as claimed in claim 1, wherein
said patterned thin film comprises:
a first thin film which is formed on the insulating member and comprises
chromium; and
a second thin film which is formed on the first thin film and comprises
copper.
5. The conductive pattern layer structure as claimed in claim 4, wherein
said conductive pattern layer structure comprises a layer structure in
which the first thin film, the second thin film and the patterned barrier
layer are stacked in that order.
6. The conductive pattern layer structure as claimed in claim 5, wherein
said patterned barrier layer comprises chromium.
Description
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to the layer structure of
conductive patterns suitable for multi-layer substrates, and more
particularly to a conductive pattern layer structure comprising a first
thin film formed on an insulating layer made of, for example, polyimide, a
second thin film formed on the first thin film, and a conductive layer
formed on the second thin film. Further, the present invention is
concerned with a method of producing such a conductive pattern layer
structure.
2. Description of the Related Art
A multi-layer substrate used in electronic devices is made of a conductive
pattern formed with a copper layer, and an insulating layer made of
polyimide and formed on the conductive pattern.
Recently, there has been considerable activity in the development of a fine
conductive pattern. In a fine conductive pattern, there is a possibility
that copper may be diffused into the polyimide layer and hence a
dielectric layer may be formed around the conductive pattern. The above
dielectric layer affects the propagation speed of a signal propagated
through the conductive pattern. Further, a space may be formed between the
conductive layer and the insulating layer, so that the insulating
breakdown voltage deteriorates. Hence, it is desired to prevent copper
contained in the conductive pattern from being diffused into the polyimide
layer.
FIG. 1 is a cross-sectional view of a related conductive pattern layer
structure, and FIGS. 2A through 2E are cross-sectional views of a method
of producing the conductive pattern layer structure shown in FIG. 1.
As shown in FIG. 1, a conductive pattern 12 is configured as follows. A
first patterned thin film 3 made of chromium is formed on a predetermined
surface portion 1A of an insulating member 1 made of polyimide, and a
second thin film 4 having the same pattern as the first thin film 3 is
formed on the first thin film 3. A conductive layer 5 made of copper is
formed on the second thin film 4, and a Cr layer 13 is formed on an upper
surface 5B of the conductive pattern 5.
The conductive pattern 12 shown in FIG. 1 is produced by the following
process. First of all, as shown in FIG. 2A, the first thin film 3 made of
Cr is formed to a thickness of 1000-2000 .ANG. on the predetermined
surface portion 1A of the insulating member 1 by sputtering. Next, the
second thin film 4 is formed to a thickness of 0.2-0.5 .mu.m on the first
thin film 3 by sputtering. In this manner, the second thin film 4 is
strongly adhered to the insulating member 1 via the thin film 3. A resist
layer 10 is formed on the second thin film 4, and is then developed so
that the resist layer 10 is patterned. The conductive layer 5 is formed to
a thickness of 4-6 .mu.m on the second thin film 4 appearing through the
patterned resist layer 10 by copper plating. Then the resist layer 10 is
removed, and a test process for validating the conductive pattern 5 may be
performed.
As shown in FIG. 2B, another resist layer 10' is formed on the second thin
film 4 and the conductive layer 5, and the Cr layer 13 is formed to a
thickness of 1000-2000 .ANG. on the conductive layer 5 and the resist
layer 10' by sputtering. Then, as shown in FIG. 2C, the resist layer 10'
and the part of the Cr layer 13 formed on the upper surface of the resist
layer 10' are removed by a lift-off process, so that only the part of the
Cr layer 13 formed on the conductive layer 5 remains. Then, as shown in
FIG. 2D, a resist layer 14 is formed on the Cr layer 13. As shown in FIG.
2E, the first and second thin films 3 and 4 are partially removed by a wet
etching process in which the resist layer 14 functions as a mask. In this
manner, the first and the second thin films 3 and 4 are patterned to have
the same pattern as the conductive layer 5. Finally, the resist layer 14
is removed, and thus the conductive pattern 12 is completed.
When an insulating layer made of polyimide is stacked on the conductive
pattern 12 so that it covers the pattern 12, the insulating layer is
formed on the Cr layer 13. Hence, it is possible to prevent copper from
being diffused into the polyimide insulating layer via the upper surface
of the conductive layer 5.
However, the above-mentioned related art has the following disadvantages.
While the first and second thin films 3 and 4 are being removed by the wet
etching process, the sidewalls of the conductive layer 5 and the sidewalls
of the first and second thin films 3 and 4 are etched by side-etching, as
indicated by broken lines shown in FIG. 1. Hence the widths of the first
and second thin films 3 and 4 and the conductive layer 5 are less than a
predetermined width B. Further, the upper surface of the conductive layer
5 is covered by the Cr layer 13, while the sidewalls of the conductive
layer 5 are exposed. Hence, copper contained in the conductive layer 5 is
diffused into another insulating layer surrounding the conductive layer 5
via the sidewalls of the conductive layer.
SUMMARY OF THE INVENTION
It is a general object of the present invention to provide a conductive
pattern layer structure and a method of producing the same, in which the
above disadvantages are eliminated.
A more specific object of the present invention is to provide a conductive
pattern layer structure in which side etching and diffusion via the
sidewalls of a conductive pattern can be prevented.
The above objects of the present invention are achieved by a conductive
pattern layer structure comprising: an insulating member comprising
polyimide; a patterned thin film formed on the insulating member; a
patterned conductive layer formed on the thin film, the patterned
conductive layer comprising copper; and a patterned barrier layer covering
an upper surface and side surfaces of the patterned conductive layer and
preventing copper from being diffused into another insulating layer formed
around the patterned barrier layer.
Another object of the present invention is to provide a method of producing
the above conductive pattern layer structure.
This object of the present invention is achieved by a method of producing a
conductive pattern layer structure comprising the steps of:
(a) forming a thin film on an insulating member comprising polyimide;
(b) forming a patterned resist layer having an opening on the thin film;
(c) forming a patterned conductive layer comprising copper on the thin film
through the opening of the resist layer;
(d) forming gaps between sidewalls of the patterned conductive layer and
sidewalls of the patterned resist layer, the thin film being exposed
through the gaps;
(e) forming a barrier layer on the thin film, the patterned conductive
layer and the patterned resist layer, the barrier layer preventing
diffusion of copper contained in the patterned conductive layer;
(g) forming a protection layer on the barrier layer;
(h) removing the patterned resist layer, and portions of the barrier layer
and the protection layer formed on the patterned resist layer by a
lift-off process, so that a patterned barrier layer is formed;
(i) patterning the thin film by an etching, so that a patterned thin film
is formed; and
(j) removing a remaining portion of the protection layer from the barrier
layer, so that an upper surface and sidewalls of the patterned conductive
layer are covered by the patterned barrier layer.
BRIEF DESCRIPTION OF THE DRAWINGS
Other objects, features and advantages of the present invention will become
more apparent from the following detailed description when read in
conjunction with the accompanying drawings, in which:
FIG. 1 is a cross-sectional view of a related conductive pattern;
FIGS. 2A through 2E are respectively cross-sectional views showing a method
of producing the conductive pattern shown in FIG. 1;
FIGS. 3A through 3E are cross-sectional views showing an overview of an
embodiment of the present invention;
FIG. 4 is a perspective view of a conductive pattern layer structure
according to the embodiment of the present invention; and
FIGS. 5A through 5G are cross-sectional views showing the details of the
embodiment of the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENT
FIGS. 3A through 3E show an overview of a method of producing a conductive
pattern layer structure according to an embodiment of the present
invention.
As shown in FIG. 3A, a first thin film 23 made of, for example, Cr, is
formed on a predetermined surface area of an insulating film 21 made of
polyimide. A second thin film 24 made of, for example, Cu, is formed on
the first thin film 23. A conductive layer 25 made of Cu is formed on the
second thin film 24. A patterned resist layer 30 is formed as shown in
FIG. 3A.
As shown in FIG. 3B, the resist layer 30 is partially removed so that gaps
S are formed between sidewalls 25A of the conductive layer 25 and
sidewalls 30A of the resist layer 30. For example, plasma 40 is applied to
the resist layer 30, as shown in FIG. 3B. The second thin film 24 is
exposed through the gaps S.
As shown in FIG. 3C, a barrier layer 26 made of, for example, Cr, is formed
on the exposed surface portion of the second thin layer 24, the conductive
layer 25 and the resist layer 30. A protection layer 27 for protecting the
Cr layer 26 is formed on the Cr layer 26.
As shown in FIG. 3D, the resist layer 30, the Cr layer 26 and the
protection layer 27 are removed by a lift-off process. Further, the first
and second thin films 23 and 24 are removed by an etching process.
Finally, as shown in FIG. 3E, the protection layer 27 is removed, and hence
a conductive pattern 20 is completed. In this manner, the sidewalls 25A
and the upper surface 25B of the conductive 25 are covered by the Cr layer
26.
It is to be noted that the conductive layer 25 is covered by the Cr layer
26 during the wet etching process in which the first and second thin films
23 and 24 are patterned. Hence, the aforementioned side etching can be
prevented. Further, when forming an insulating film made of polyimide so
as to cover the conductive layer 25, the insulating film is directly
formed on the Cr layer 26. That is, the insulating film does not come into
contact with the conductive layer 25. Hence, it is possible to prevent
copper into being diffused in the polyimide insulating layer and to
prevent decrease in the propagation speed of a signal transferred via the
conductive pattern 20 and deterioration of the breakdown voltage.
A description will now be given of the details of the above embodiment of
the present invention.
Referring to FIG. 4, the conductive pattern 20 patterned on a predetermined
surface portion of the insulating film 21 made of polyimide comprises the
Cr thin film 23 made of Cr and formed on the insulating film 21, the
second thin film 24 made of Cu and formed on the first thin film 23, and
the conductive layer 25 covered by the Cr layer 26. As has been described
previously, the Cr layer 26 covers the upper surface 25B and the sidewalls
25A of the conductive layer 25.
The layer structure of the conductive pattern 20 can be produced by the
following process. As shown in FIG. 5A, the first thin film 23 of Cr and
the second thin film 24 of Cu are formed in that order by sputtering.
Next, the resist layer 30 is formed on the second thin film 24, and is
patterned so that the resist layer 30 is partially removed and the second
thin film 24 partially appears. Then, by copper plating, the conductive
layer 25 is formed on the second thin film 24. Thereafter, the entire
insulating film 21 is cooled to a temperature between
-10.degree.--60.degree. C. for 30-90 minutes. By this cooling process, the
resist layer 30 is contracted, as shown in FIG. 5B, and cracks C occur
between the sidewalls 25A of the conductive layer 25 and the sidewalls 30A
of the resist layer 30.
As shown in FIG. 5C, plasma 20 is irradiated on the cracks C, as indicated
by arrows in FIG. 5C, and the resist 30 is partially removed. In this
manner, gaps S are formed between the sidewalls 25A of the conductive
layer 25 and the sidewalls 30A of the resist layer 30, and hence the
second insulating film 24 is partially exposed via the gaps S.
As shown in FIG. 5D, the Cr layer 26 is formed to a thickness of 1000-2000
.ANG. on the upper surface 25B of the conductive layer 25, the upper
surface of the resist layer 30 and the exposed surface portions of the
second thin film 24. Further, the protection layer 27, which comprises a
first layer 28 and a second layer 29, is formed on the upper surface of
the Cr layer 26. The first layer 28 of the protection layer 27 is formed
by depositing SiO.sub.2 to a thickness of 1000-2000 .ANG. by sputtering.
The second layer 29 of the protection layer 27 is formed by depositing Ti
or Cr to a thickness of 1000-2000 .ANG. by sputtering.
As shown in FIG. 5E, the resist layer 30 is completely removed, and the Cr
layer 26 and the protection layer 27 are partially removed by a lift-off
process, so that only parts of the Cr layer 26 and the protection layer 27
remain on the upper surface 25B of the conductive layer 25 and the exposed
surface portions of the second thin film 24.
Then, as shown in FIG. 5F, the second thin film 24 is patterned by a wet
etching in which the protection layer 27 is used as a mask, and the first
thin film 23 is patterned. In this manner, the portions of the first and
second thin films 23 and 24 which are not covered by the protection layer
27 are removed. It is to be noted that the sidewalls 25A and the upper
surface 25B of the conductive layer 25 are covered by the Cr layer 26 and
the protection layer 27 and hence side etching can be prevented.
Finally, as shown in FIG. 5G, the remaining part of the protection layer 27
is removed. In this manner, it is possible to produce the conductive
pattern layer structure 20, in which the upper surface 25B and the
sidewalls 25A of the conductive layer 25 are covered by the Cr layer 26.
The protection layer 27 can be removed in the following way. When the
second layer 29 is made of Ti, an etchant of HF+HNO.sub.3. When the second
layer 29 is made of Cr, an etchant of K.sub.3 Fe(CN).sub.6 +NaOH can be
used. The first layer 28 made of SiO.sub.2 can be removed by an etchant of
HF+HNO.sub.3.
The layer structure of the conductive pattern 20 shown in FIG. 5G is used
for a multi-layer substrate, in which a plurality of layers, each having
the structure shown in FIG. 5G, are sequentially stacked. In this case,
the conductive pattern 20 will be covered by an insulating member or layer
made of polyimide. However, because the conductive layer 25 is covered by
the Cr layer 26, copper can be prevented from being diffused into the
polyimide insulating member.
In practice, in the production step shown in FIG. 5A, the first thin film
23 of Cr is deposited, by sputtering, to a thickness of 1000 .ANG. at
200.degree. C. in approximately 10 minutes in the state in which the
insulating film 21 is maintained at a potential of, for example, DC 4KW.
Then, in the same condition as the above, the second thin film 24 of Cu is
deposited to a thickness of 5000 .ANG.. Thereafter, the resist layer 30 of
an acrylic negative-type is deposited, and is then hardened by drying it
at 80.degree. C. for 30 minutes. Then, the resist layer 30 is exposed by a
PLA exposure process of 300 mj. Thereafter, the resist layer 30 is
developed so that it is patterned into a predetermined shape. Then, the
layer structure is placed in a copper sulfate plating chamber and the
plating process is performed for about 20 minutes. In this manner, the
conductive layer 25 having a thickness of 0.4 .mu.m is formed.
In the production step shown in FIG. 5B, the device is cooled at a
temperature of -10.degree. C. for approximately 30 minutes, so that the
cracks C are generated between the conductive layer 25 and the resist
layer 30 (plastic deformation).
In the production step shown in FIG. 5C, the resist layer 30 is partially
removed by a plasma asher in which plasma 40 is irradiated at a
temperature between 30.degree.-50.degree. C. for approximately 30 minutes.
In the production step shown in FIG. 5D, the Cr layer 26 is deposited to a
thickness of 1500 .ANG. by a sputtering process which is carried out at a
temperature of 50.degree. C. for approximately 15 minutes while the
insulating film 21 is being maintained at a voltage of DC 4KW. The first
layer made of SiO.sub.2 is deposited to a thickness of 3000 .ANG. by a
sputtering process performed at a temperature of 50.degree. C. for
approximately 40 minutes while the insulating film 21 is being maintained
at a voltage of DC 1KW. The second layer made of Ti is deposited to a
thickness of 1000 .ANG. by a sputtering process performed at a temperature
of 50.degree. C. for approximately 10 minutes at a voltage of DC 3KW.
In the production step shown in FIG. 5E, the lift-off process is performed
using methylene chloride CH.sub.2 Cl.sub.2 at room temperature for
approximately 20 minutes.
In the production step shown in FIG. 5F, the 5000 .ANG.-thick second thin
film 24 made of Cu is etched at a temperature of 40.degree. C. in
approximately 40 seconds by using an NH.sub.4 SO.sub.4 +NaCl etchant.
Then, the 1000 .ANG.-thick first thin film made of Cr is etched at a
temperature of 32.degree. C. in approximately 2 minutes using a K.sub.3
Fe(CN).sub.6 +NaOH etchant.
In the production step shown in FIG. 5G, the second layer 29 of Ti having a
thickness of 1000 .ANG. is removed at room temperature in approximately 30
minutes by an etching process using an HF+HNO.sub.3 etchant. Then, the
first layer 28 made of SiO.sub.2 having a thickness of 3000 .ANG. is
removed under the same condition as the above.
The present invention is not limited to the specifically described
embodiment, and variations and modifications may be made without departing
from the scope of the present invention.
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