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United States Patent | 5,233,606 |
Pashan ,   et al. | August 3, 1993 |
A shared-buffer-memory-based ATM switching module (FIG. 1) used with ATM cells having a multiplicity of priorities has a plurality of queues (100) for each output port (O-N), one for each cell priority, and handles buffer overflow in a manner fair to all output ports. It initially allows output-port queues (100) to completely consume the buffer memory (12). Thereafter, when an additional incoming cell is received for which there is no room in the buffer memory, the lengths of all of the queues of each output port are individually summed (402) and compared to determine which port has the greatest number of buffered cells (406). A buffered ATM cell is discarded (410) from the lowest-priority non-empty queue of that port (408). The incoming cell is then stored in the memory space vacated by the discarded cell (412).
Inventors: | Pashan; Mark A. (Wheaton, IL); Spanke; Ronald A. (Wheaton, IL) |
Assignee: | AT&T Bell Laboratories (Murray Hill, NJ) |
Appl. No.: | 739931 |
Filed: | August 2, 1991 |
Current U.S. Class: | 370/418; 340/825.5; 711/159 |
Intern'l Class: | H04J 003/24 |
Field of Search: | 370/60,61,85.2,85.6,94.1 340/825.5,825.51,825.52 395/425 |
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Foreign Patent Documents | |||
9104624 | Apr., 1991 | WO. |
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