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United States Patent | 5,181,088 |
Mikata ,   et al. | January 19, 1993 |
An MOS FET of the semiconductor device includes a semiconductor substrate on which a projection is formed via a given film. The projection is made of a polysilicon having grain boundaries. A pair of gate electrodes are provided so that one of the gate electrodes faces the other thereof via side walls of the projection and gate oxide films. A conductive channel forming area is formed at the side walls of the projection, so that the extending direction of the channel is parallel to the thickness direction of the substrate.
Inventors: | Mikata; Yuuichi (Kawasaki, JP); Usami; Toshiro (Yokohama, JP) |
Assignee: | Kabushiki Kaisha Toshiba (Kawasaki, JP) |
Appl. No.: | 700311 |
Filed: | May 8, 1991 |
Sep 14, 1988[JP] | 63-231058 |
Current U.S. Class: | 257/331; 257/332; 257/334; 257/E29.262; 257/E29.274 |
Intern'l Class: | H01L 029/10 |
Field of Search: | 357/23.4,23.7,59 E,59 R,4 |
4470060 | Sep., 1984 | Yamazaki. | |
4554570 | Nov., 1985 | Jastrzebski et al. | 357/23. |
4554572 | Nov., 1985 | Chatterjee | 357/59. |
4670768 | Jun., 1987 | Sunami et al. | 357/23. |
4672410 | Jun., 1987 | Mikata. | |
4920397 | Apr., 1990 | Ishijima | 357/23. |
4937641 | Jun., 1990 | Sunami et al. | 357/23. |
4951102 | Aug., 1990 | Beitman et al. | 357/23. |
5001540 | Mar., 1991 | Ishihara | 357/23. |
Foreign Patent Documents | |||
0020929 | Jan., 1981 | EP. | |
63-40376 | Feb., 1988 | JP | 357/23. |
1-9662 | Jan., 1989 | JP | 357/23. |
Patent Abstracts of Japan, vol. 7, No. 200 (E-196) [1345], Sep. 3, 1983; Japanese Patent Publication No. 58-97868, dated Jun. 10, 1983, Yoshioka. Patent Abstracts of Japan, vol. 10, No. 340 (E-455)[2396], Nov. 18, 1986; Japanese Patent Publication No. 61-144875, dated Jul. 2, 1986, Ebihara. |