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United States Patent | 5,148,396 |
Nakada | September 15, 1992 |
Write data lines and write amplifier enable signal lines are connected to write amplifiers of a semiconductor memory device which can be switched between one-bit input and output mode configuration and multi-bit input and output mode configuration by the shared use of a single chip. Write mask data for memory write mask is supplied to the write amplifiers by the write amplifier enable signal lines.
Inventors: | Nakada; Kazuhiro (Tokyo, JP) |
Assignee: | NEC Corporation (Tokyo, JP) |
Appl. No.: | 485693 |
Filed: | February 27, 1990 |
Feb 27, 1989[JP] | 1-45824 |
Current U.S. Class: | 365/189.03; 365/49; 365/230.06; 365/238.5 |
Intern'l Class: | G11C 007/00; G11C 008/00 |
Field of Search: | 365/49,230.06,49,230.03,189.03,219,220,238.5,120 |
4618947 | Oct., 1986 | Tran et al. | 365/238. |
4744053 | May., 1988 | Luhrmann | 365/49. |
4876671 | Oct., 1989 | Norwood et al. | 365/238. |
4879692 | Nov., 1989 | Tokushige | 365/238. |
4902917 | Feb., 1990 | Simpson | 365/189. |
4907203 | Mar., 1990 | Wada et al. | 365/189. |
4943962 | Jul., 1990 | Imamiya et al. | 365/238. |