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United States Patent | 5,040,149 |
Ebihara ,   et al. | August 13, 1991 |
A semiconductor memory includes an input buffer means for storing inputted data, an output buffer means for storing the data and for outputting the data and a storage means for storing the data outputted from the input buffer means and for transferring the data to the output buffer means. The input buffer means includes a plurality of memories having equal capacity. The output buffer means also includes a plurality of memories having equal capacity. The memory means have memory capacity of a divisor of memory capacity per line of the storage means. In addition, the semiconductor memory can also include a dividing means for dividing image data outputted from said input buffer into smaller data units to be written on said storage means and a recombining means for said smaller data units outputted from said storage means to supply to said output buffer means.
Inventors: | Ebihara; Norio (Kanagawa, JP); Sasaki; Takayuki (Kanagawa, JP); Kita; Hiroyuki (Kanagawa, JP); Ohsawa; Yoshihito (Kanagawa, JP) |
Assignee: | Sony Corporation (Tokyo, JP) |
Appl. No.: | 496076 |
Filed: | March 15, 1990 |
Apr 28, 1986[JP] | 61-98847 | |
Apr 30, 1986[JP] | 61-100044 |
Current U.S. Class: | 365/189.05; 365/219; 365/220; 365/230.03; 365/230.04 |
Intern'l Class: | G11C 007/00; G11C 011/409; G11C 011/416 |
Field of Search: | 365/189.04,189.05,219,230.04,230.05,230.03,239,220 |
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4567579 | Jan., 1986 | Patel et al. | 365/189. |
4608671 | Aug., 1986 | Shimizu et al. | 365/189. |
4630230 | Dec., 1986 | Sundet | 365/189. |
4648077 | Mar., 1987 | Pinkham et al. | 365/189. |
4688197 | Aug., 1987 | Novak et al. | 365/230. |
4701884 | Oct., 1987 | Aoki et al. | 365/221. |
4725987 | Feb., 1988 | Cates | 365/189. |
4747081 | May., 1988 | Heilveil et al. | 365/219. |
4777624 | Oct., 1988 | Ishizawa et al. | 365/189. |
4789960 | Dec., 1988 | Willis | 365/189. |
Wescon Technical Papers, vol. 16, 19th-22nd Sep. 1972, pp. 413.1-413.5; Y. Hsia: "Memory Applications of the MNOS", p. 413.3, left-hand column, line 23, p. 413.4, left-hand column, line 10. IEEE Journal of Solid-State Circuits, vol. SC-19, No. 6, Dec. 1984, pp. 999-1007; R. Pinkham et al: "A High Speed Dual Port Memory with Simultaneous Serial and Random Mode Access for Video Applications", FIGS. 1,6, p. 999, line 14, line 10; p. 1003, line 15, line 21. Patent Abstracts of Japan, vol. 7, No. 249 (P234[1384], 5th Nov. 1983; & JP-A-58 133 698 (Nippon Denki K.K.) 09-08-1983. SMPTE Journal, vol. 89, No. 4, Apr. 1984, pp. 257-262; T. Yoshino et al: "Digital Frame Memory for Still Picture Television Receivers PASS Encoding System and Application", FIG. 15, p. 261, col. 3, line 17, p. 262, col. 1, line 19. |