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United States Patent | 5,023,778 |
Simon, Jr. ,   et al. | June 11, 1991 |
A communication method provides for an exchange of a multiple byte message between two processors. Interrupt suppression associated with the message transfer is minimized by alternating the processors between master and slave operating modes with each byte exchanged.
Inventors: | Simon, Jr.; Robert C. (Novi, MI); Deutscher; Dale W. (Phoenix, AZ); Grimm; Charles M. (Luxembourg, LU); Thompson; Dennis D. (Atlanta, IN); Bailey; Kirk A. (Carmel, IN) |
Assignee: | General Motors Corporation (Detroit, MI); Delco Electronics Corp. (Kokomo, IN) |
Appl. No.: | 498080 |
Filed: | March 23, 1990 |
Current U.S. Class: | 709/209; 703/27 |
Intern'l Class: | G06F 015/16; G06F 013/00 |
Field of Search: | 364/200 MS File,900 MS File,514 370/61,83 |
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Motorola Semiconductor Technical Data, MC68HC11A8 HCMOS Single-Chip Microcomputer Advance Information, pp. 1.varies.6 through 6-6, 1985. |